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MIPS Technologies, Inc. designs high-performance, low-power, 32-bit and 64-bit reduced instruction-set computing (RISC) microprocessor architectures and cores for embedded systems. MIPS licenses technology to semiconductor companies and system OEMs.
The MIPS RISC architecture CPUs range from 50 MHz 32-bit R3000-based devices up to 266 MHZ 64-bit R5000-based CPUs.
In addition, the MIPS16 code compression offers a 40 percent reduction in code size while retaining full compatibility with existing binaries.
MIPS-based implementations are available with die sizes that range from 2-sq. mm to 300-sq. mm and very low power consumption.
MIPS-compliant microprocessors include a large and varied group of products developed by different manufacturers.
In This Section
- Intrinsic Functions for MIPS Microprocessors
Provides reference information about MIPS-specific intrinsic functions. - MIPS Compiler Options
Provides reference information about MIPS-specific compiler options. - MIPS Calling Sequence Specification
Describes registers, stack frame layout, and assemblers.
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